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AD7328
TYPICAL CONNECTION DIAGRAM
Figure 32 shows a typical connection diagram for the AD7328.
In this configuration, the AGND pin is connected to the analog
ground plane of the system, and the DGND pin is connected to
the digital ground plane of the system. The analog inputs on the
AD7328 can be configured to operate in single-ended, true dif-
ferential, or pseudo differential mode. The AD7328 can operate
with either an internal or external reference. In Figure 32, the
AD7328 is configured to operate with the internal 2.5 V reference.
A 680 nF decoupling capacitor is required when operating with
the internal reference.
Rev. A | Page 18 of 36
The V
CC
pin can be connected to either a 3 V or 5 V supply voltage.
The V
DD
and V
SS
are the dual supplies for the high voltage analog
input structures. The voltage on these pins must be equal to or
greater than the highest analog input range selected on the analog
input channels (see Table 6 for more information). The V
DRIVE
pin
is connected to the supply voltage of the microprocessor. The
voltage applied to the V
DRIVE
input controls the voltage of the
serial interface. V
DRIVE
can be set to 3 V or 5 V.
AD7328
V
CC
V
DRIVE
V
DD1
INSERIAL
μC/μP
V
IN
0
V
IN
1
V
IN
2
V
IN
3
V
IN
4
V
IN
5
V
IN
6
V
IN
7
REFIN/OUT
CS
DOUT
SCLK
DIN
DGND
10μF
0.1μF
+
10μF
0.1μF
+
10μF
0.1μF
+
ANALOG INPUTS
+15V
–15V
680nF
V
SS1
V
CC
+2.7V TO +5.25V
1
MINIMUM V
AND V
SUPPLY VOLTAGES
DEPEND ON THE HIGHEST ANALOG INPUT
RANGE SELECTED.
AGND
0
10μF
0.1μF
+
+3V SUPPLY
Figure 32. Typical Connection Diagram
ANALOG INPUT
Single-Ended Inputs
The AD7328 has a total of eight analog inputs when operating
in single-ended mode. Each analog input can be independently
programmed to one of the four analog input ranges. In applications
where the signal source is high impedance, it is recommended
to buffer the signal before applying it to the ADC analog inputs.
Figure 33 shows the configuration of the AD7328 in single-
ended mode.
AD7328
1
V
IN
+
V+
V–
V
DD
V
SS
V
CC
5V
AGND
1
ADDITIONAL PINS OMITTED FOR CLARITY.
Figure 33. Single-Ended Mode Typical Connection Diagram
0
True Differential Mode
The AD7328 can have four true differential analog input pairs.
Differential signals have some benefits over single-ended
signals, including better noise immunity based on the device’s
common-mode rejection and improvements in distortion
performance. Figure 34 defines the configuration of the true
differential analog inputs of the AD7328.
AD7328
1
V
IN
+
V
IN
–
1
ADDITIONAL PINS OMITTED FOR CLARITY.
0
Figure 34. True Differential Inputs
The amplitude of the differential signal is the difference
between the signals applied to the V
IN
+ and V
IN
pins in
each differential pair (V
IN
+ V
IN
). V
IN
+ and V
IN
should
be simultaneously driven by two signals of equal amplitude,
dependent on the input range selected, that are 180° out of
phase. Assuming the ±4 × V
REF
mode, the amplitude of
the differential signal is 20 V to +20 V p-p (2 × 4 × V
REF
),
regardless of the common mode.
The common mode is the average of the two signals
(
V
IN
+ +
V
IN
)/2
and is therefore the voltage on which the two input signals are
centered.
This voltage is set up externally, and its range varies with reference
voltage. As the reference voltage increases, the common-mode
range decreases. When driving the differential inputs with an
amplifier, the actual common-mode range is determined by the
amplifier’s output swing. If the differential inputs are not driven
from an amplifier, the common-mode range is determined by
the supply voltage on the V
DD
supply pin and the V
SS
supply pin.
When a conversion takes place, the common mode is rejected,
resulting in a noise-free signal of amplitude 2 × (4 × V
REF
) to
+2 × (4 × V
REF
), corresponding to Digital Codes 4096 to +4095.
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